Alif Semiconductor /AE512F80F55D5AS_CM55_HE_View /NPU_HE /NPUHE_PMCAXI_CHAN

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Interpret as NPUHE_PMCAXI_CHAN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)CH_SEL0 (Val_0x0)AXI_CNT_SEL 0 (Val_0x0)BW_CH_SEL_EN

AXI_CNT_SEL=Val_0x0, CH_SEL=Val_0x0, BW_CH_SEL_EN=Val_0x0

Description

Performance Monitor AXI Channel Select Register

Fields

CH_SEL

Select channel to monitor for bandwidth or latency measurements Read operations: Write operations:

0 (Val_0x0): Cmd

1 (Val_0x1): IFM

2 (Val_0x2): Weights

3 (Val_0x3): Bias and Scale

4 (Val_0x4): Mem2Mem

8 (Val_0x8): OFM

9 (Val_0x9): Mem2Mem

AXI_CNT_SEL

Select AXI counter to monitor for latency measurements A maximum of two separate outstanding transaction queues can be connected to each AXI interface. The counters are used to express the maximum number of outstanding jobs per queue.

0 (Val_0x0): AXI counter 0 (AXI port 0, outstanding counter 0)

1 (Val_0x1): AXI counter 1 (AXI port 0, outstanding counter 1)

2 (Val_0x2): AXI counter 2 (AXI port 1, outstanding counter 0)

3 (Val_0x3): AXI counter 3 (AXI port 1, outstanding counter 1)

BW_CH_SEL_EN

Enable bandwidth channel selector

0 (Val_0x0): AXI BW events measured for all channels

1 (Val_0x1): AXI BW events measured for channel specified by [CH_SEL]

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